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Research on asymmetric half bridge converter

Abstract: an asymmetric half bridge dc/dc converter controlled by complementary PWM is introduced. The steady-state process of the circuit and the ZVS process of the switch are analyzed, and the conditions for the switch to reach ZVS are analyzed. The experimental results show the effectiveness of this circuit in improving efficiency. In order to further improve the circuit, aiming at the unbalanced voltage stress of the output diode of the circuit, a topology with unequal secondary windings is proposed and analyzed

key words: asymmetric half bridge; Zero voltage switch; Efficiency

1 Introduction

in recent years, soft switching technology has been widely developed and applied, and many high-efficiency circuit topologies have been proposed, among which asymmetric half bridge is a typical circuit

asymmetric half bridge is a dc/dc zero voltage switching (ZVS) converter circuit suitable for low and medium power. The circuit adopts a fixed dead time complementary PWM control mode, does not need additional components, makes full use of the distribution characteristics of the circuit itself, and realizes zero voltage switching through the resonance of transformer leakage inductance and switch parasitic capacitance. This circuit keeps the low switching loss of PWM switching mode and eliminates the switching loss. Therefore, it can obtain high efficiency

2 analysis of the working principle of the main circuit

2.1 steady state analysis of the circuit

the main circuit of the asymmetric half bridge is shown in Figure 1. Figure 1 includes two complementary controlled power MOSFETs, in which the duty cycle of S1 is D, the duty cycle of S2 is (1-D), DS1 and DS2 are the body diodes of the switch, and CS1 and CS2 are the junction capacitance of the switch respectively. The DC isolating capacitor CB is used as the power supply when switch S2 is turned on. For transformers with leakage inductance LK and center tap of excitation inductance LM, the number of turns on the primary side is NP, and the number of turns on the secondary side is NS1 and NS2 for 3 to 5 years. Half bridge full wave rectifier diode D1 and D2. Output filter inductance L, capacitance CF and load RL

Figure 1 asymmetrical half bridge main circuit diagram

the steady-state working principle of the circuit is:

1) when S1 is turned on, the primary side of the transformer bears the forward voltage, the secondary side NS1 works, the diode D1 is turned on, the switch S2, and the diode D2 is cut off

2) when S2 is on, the DC isolating capacitor CB is added to the primary side of the transformer, and the secondary side NS2 works, and the switch S1 and diode D1 are cut off

the ideal working waveform is shown in Figure 2. Where n1=np/ns1, n2=np/ns2, and n1=n2=n. Through the steady-state analysis of the circuit, the following formulas can be obtained

Figure 2 ideal waveform of asymmetric half bridge

due to the volt second balance of the transformer, the DC component of the voltage is added to the DC isolation capacitor CB

vcb=dvin (1)

from the magnetic balance of the output filter inductance, the output voltage

2.2 ZVS process analysis of the switch

the ZVS process of switch S2 is analyzed in three working modes below. The ideal working waveform is shown in Figure 3

Fig. 3 waveform of ZVS process of asymmetric half bridge switch S2

1) switching mode 1 (t0 ~ T1) at time T0, S1 is turned off, the parasitic capacitance CS1 of S1 is linearly charged, and the parasitic capacitance CS2 of S2 is linearly discharged. Transformer secondary side D1 freewheeling. This phase ends at T1 when va=vcb

2) when switching mode 2 (T1 ~ T2) t=t1, the primary voltage of the transformer becomes negative, and the capacitors CS1, CS2 and leakage inductance LK have series resonance

va (and the cutting force of drilling holes with different diameter ratios will increase with the decrease of diameter ratio T) = discuss the key technology of military and civil new materials and the innovative direction of new material products vcb-ip1znsin K (t-t1) (3)

IP (T) = ip1cos K (t-t1) (4)

where: IP1 is the primary current of transformer at T1

zn is the characteristic impedance, zn=

k is the resonant angular frequency k=

C=CS1=CS2。

as the negative pressure is added to LK, the leakage current IP begins to decrease. In order to keep the output current IO constant on the secondary side, the rectifier diodes D1 and D2 are connected together, the secondary side of the transformer is equivalent to a short circuit, and the voltage on the primary side of the transformer is all added to the leakage inductance

3) in switching mode 3 (T2 ~ T4), when t=t2 and va=0, the body diode DS2 of S2 begins to turn on, creating conditions for S2 to turn on at zero voltage. At this time, a constant voltage VCB is added to LK, and the primary current IP of the transformer decreases linearly. When t=t3, IP crosses zero and increases in reverse, and diodes D1 and D2 continue to conduct together

s2 must be connected between T2 and T3, otherwise the zero voltage opening condition will be lost. Therefore, the dead time (ta-t0) between switching pulses should be properly designed

according to the opening transient analysis of asymmetric half bridge switch S2, the following two conditions must be met to enable the switch to realize ZVS opening

(1) when S2 is turned on, the voltage (i.e. VA) at both ends of S2 must be less than zero and the IP is still positive, that is, the circuit must have a certain load current. From formula (3), we can get

ip1 (5)

the condition that the characteristic impedance should meet is

zn (6)

(2) an appropriate dead time should be ensured between the two switching pulses to make S2 turn on when its voltage crosses zero. That is to meet t2-t0 ta-t0 t3-t0, where

t2-t0=c + arcsin (7)

t3-t0= (t2-t0) + LK (8)

s1, the zero voltage opening process is similar to S2. When S2 is turned off and S1 is ready to turn on, IP charges CS2 and CS1 discharges. LK, CS1 and CS2 form a series resonant circuit. When the voltage on CS1 is set to zero, the body diode DS1 of S1 is turned on. When S1 is turned on, the ZVS of S1 is turned on

3 experimental results

based on the above analysis, a circuit with a frequency of 100kHz is designed. The input voltage is 40 ~ 60V, the output voltage is 12V, and the output current is 6A. Stp75ne75 is selected as the primary switch, stp10h100ct is selected as D1, and stp30l60ct is selected as D2. The power transformer adopts eer28 skeleton, np=10 turns, ns1=ns2=6 turns. The drain source voltage waveform and drain current waveform of S1 and S2 obtained from the experiment are shown in Figure 4. As can be seen from Figure 4, both S1 and S2 implement ZVS

(b) vin=60v

(a) vin=40v

(d) vin=60v

(c) vin=40v

Figure 4 experimental waveform at different input voltages

4 improvement of asymmetric half bridge

the steady-state analysis of Figure 1 also shows that the reverse voltage borne by the output diode when it is turned off

vd1= (9)

the export share of emerging countries will also be greatly increased

vd2= (10)

as mentioned earlier, the maximum value of the asymmetric half bridge duty cycle is 0.5. Therefore, from equations (9) and (10), it can be concluded that when the duty cycle is very small, the diode D2 will bear a large back pressure. And this situation is more serious when the input voltage range is wide

if a circuit with unequal secondary windings is used (i.e. ns2/ns1 is greater than 1), the duty cycle can be greater than 0.5, thus eliminating the problem of uneven voltage stress of diodes. At this time, the output voltage of the asymmetric half bridge is

vo= (11)

the following is a specific derivation of how to calculate the value of ns2/ns1 according to the known conditions

let a=ns2/ns1 (12)

then equation (11) can be changed into

ns1= (13)

let the change range of duty cycle be D1 ~ D2, and D1 0.5 D2, that is, when the input voltage is the maximum value vinmax, the duty cycle is D1, and when the input voltage is the minimum value, the duty cycle is D2, that is,

ns1= (14)

ns1= (15)

from equation (14) and equation (14).15) get

= (16)

Let f (D2) =, And find the maximum value of this function. It can be concluded that when

d2= (17)

, function f (D2) gets the maximum value. Obviously, when the duty cycle is symmetrically distributed around 0.5, the best effect can be obtained. You can get

d1= (18)

substitute equations (17) and (18) into equation (16), and you can get the value of A

take the experiment in this paper as an example to illustrate the benefits of asymmetric winding on diode selection

Figure 5 is the voltage stress diagram of the output diode when the output voltage is 12V. As can be seen from Figure 5, when ns2/ns1 increases, the voltage stress of diode D1 will increase, while the voltage stress of diode D2 will decrease. When ns2/ns1=1, the voltage stress range of the two diodes is about 25 ~ 50V. When ns2/ns1=3, the maximum voltage stress of diode is less than 35V

Figure 5 voltage stress of output diode

5 conclusion

asymmetric half bridge dc/dc converter uses complementary PWM control, makes full use of the characteristics of the circuit, and achieves ZVS opening of the switch in a resonant way, thus eliminating the switching loss and improving the efficiency of the circuit

at the same time, the asymmetry of the secondary winding solves the problem of uneven voltage stress of the output diode of the ordinary asymmetric half bridge circuit. In this way, low-voltage diodes can be selected, which not only saves the cost, but also further improves the efficiency of the circuit

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